Univ.-Prof. Dr. Daniel Große

Univ.-Prof. Dr. Daniel Große

Science Park 4, 3rd floor, room 0318
daniel.grosse@jku.at
+43 732 2468 4560

CV Publications Professional Service Projects Miscellaneous (incl. Awards)


Bio

Daniel Große is a full professor at the Johannes Kepler University (JKU) Linz, Austria, where he is the head of the Institute for Complex Systems (ICS).

From 1997 to 2002, Daniel Große studied computer science (Diploma) at the University of Freiburg, Germany. In 2008, he received the Dr.-Ing. degree in computer science from the University of Bremen. He remained as a Postdoc with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with the University of Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. After that, until 2020, he was a Senior Researcher at the University of Bremen as well as Scientific Coordinator of the Graduate School System Design funded within the German Excellence Initiative. In addition, he has been working at the German Research Center for Artificial Intelligence (DFKI) since 2015. In July 2020, he became a full professor at JKU.

His current research interests include verification, virtual prototyping, debugging, synthesis and RISC-V. He published over 160 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including ASP-DAC, DAC, DATE, ICCAD, CODES+ISSS, GLSVLSI, FDL, and MEMOCODE. He received best paper awards (FDL 2007, DVCon Europe 2018, ICCAD 2018, FDL 2020 and FDL 2022) as well as business-related awards (IKT Innovativ Award 2013, Weconomy Award 2013, and Embedded Award 2014). He is an IEEE Senior Member and an Allied Member of the Accellera Systems Initiative in the SystemC Verification Working Group.


Curriculum Vitae

Personal Data

Date of birth: 1977
Marital Status: married, 3 children
Nationality: German

Scientific Career and Working Experience

Since 2022 Head of the “LIT Secure and Correct Systems Lab” (composing the expertise of over ten institutes) at the Johannes Kepler University Linz, Austria
Since 07/2020 Full Professor (W3-equivalent) for Complex Systems at Johannes Kepler University Linz, Austria
Since 2015 Senior Researcher at the German Research Center for Artificial Intelligence (DFKI), Bremen, Germany
2015–2020 Scientific Coordinator of Graduate School System Design (SyDe) funded within the German Excellence Initiative
2015–2020 Senior Researcher at University of Bremen, Germany (permanent position)
2013–2014 CEO and co-founder of solvertec GmbH, start-up in Electronic Design Automation, spin-off from University of Bremen with pre-phase via EXIST Transfer of Research
2008–2013 Postdoc at the University of Bremen, Germany
2010 Substitute Professor at the University of Freiburg, Germany (Prof. Bernd Becker)
2008 Dissertation, Title: “Quality-Driven Design and Verification Flow for Digital Systems”
Degree: Dr.-Ing. (Grade: summa cum laude)
2002–2008 Doctoral Candidate at the University of Bremen in Group of Computer Architecture (Prof. Rolf Drechsler)
2002 Diploma Thesis, Title: “Formale Verifikation von SystemC-Beschreibungen”
Degree: Diploma (Grade: 1.4, very good)
2000–2002 Freelancer at Bässgen AV-Technik GmbH, Freiburg, Germany, network administration and hardware development
1999–2000 Student assistant at the University of Freiburg, Germany, for courses in Technical Computer Science
1999–2000 Freelancer at Comet-Medizintechnik, Freiburg, Germany, software development for visualizing coronary angiography
1997–2002 Studies of Computer Science (Diploma) at the University of Freiburg, Germany
1995–1999 Managing Director of Große & Poschadel Computerservice GbR, Freiburg, Germany, hardware sales and consulting services

School Education and Civilian Service

1996–1997 Civilian Service at Herzzentrum Bad Krozingen, Germany
1988–1996 Kreisgymnasium Kirchzarten, Germany, (Secondary School), Degree: German High School Diploma (Abitur)
1988 Gymnasium Kenzingen, Germany (Secondary School)
1983–1987 Ernst-Thälmann-Oberschule, Weimar, German Democratic Republic (Primary School)

Publications


Professional Service

Organization of Conferences and Workshops

2022 General Chair of Forum on specification & Design Languages (FDL)
2020 Publication Chair of the Forum on specification & Design Languages (FDL)
2020 Member of the Organizing Committee for the International Workshop on Boolean Problems (IWSBP)
2019 Special Session Chair of the Forum on specification & Design Languages (FDL)
2018 Special Session Chair of the Forum on specification & Design Languages (FDL)
2017 Member of the Organizing Committee for the Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2017 Publication Chair of the Forum on specification & Design Languages (FDL)
2011 General Chair of GMM/ITG/GI-Workshop Cyber-Physical Systems - Enabling Multi-Nature Systems (CPMNS)

Program Chair

2021 Forum on specification & Design Languages (FDL)
2020 International Workshop on Boolean Problems (IWSBP)
2017 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)

Organization of Special Sessions, Tutorials, Panels

2020 Tutorial entitled “Cross-level compliance testing and verification for RISC-V” at Design and Verification Conference Europe (DVCon Europe)
2019 Special session entitled “RISC-V based Firmware Design” at Forum on specification & Design Languages (FDL)
2018 Tutorial entitled “Firmware firmly under control: New optimization and verification techniques for application specific electronic systems” at Design and Verification Conference Europe (DVCon Europe)
2018 Special session entitled “Embedded software for the IoT: Design, optimization and verification” at Forum on specification & Design Languages (FDL)
2017 Tutorial entitled “Automatic Firmware Design for Application-specific Electronic Systems: Opportunities, Challenges and Solutions” at Design and Verification Conference Europe (DVCon Europe)
2016 Special session entitled “Reliability and Safety in VP-based Embedded System Development” at Forum on specification & Design Languages (FDL)
2011 Panel on “ESL HW/SW verification: A reality check” at Design Automation Conference (DAC), together with Frank Schirrmeister (Synopsys)

Track/Topic Chair

2017 International Conference on Computer Aided Design (ICCAD) for track “Testing, Validation, Simulation, and Verification”
2016 International Conference on Computer Aided Design (ICCAD) for track “Validation, Simulation, and Verification”
2013 Forum on specification & Design Languages (FDL) for topic “Testbench automation and debugging techniques”

PC Member

2023 Design Automation and Test in Europe (DATE)
2022 International Conference on Very Large Scale Integration (VLSI-SoC)
2022 International Conference on Computer Aided Design (ICCAD)
2022 Great Lakes Symposium on VLSI (GLSVLSI)
2022 International Workshop on Boolean Problems (IWSBP)
2022 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2021 International Conference on Computer Aided Design (ICCAD)
2021 International Conference on Very Large Scale Integration (VLSI-SoC)
2021 Great Lakes Symposium on VLSI (GLSVLSI)
2021 Design Automation Conference (DAC)
2021 Design Automation and Test in Europe (DATE)
2021 Asia and South Pacific Design Automation Conference (ASP-DAC)
2021 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2020 Forum on specification & Design Languages (FDL)
2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
2020 Great Lakes Symposium on VLSI (GLSVLSI)
2020 Design Automation Conference (DAC)
2020 Design Automation and Test in Europe (DATE)
2020 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2019 Forum on specification & Design Languages (FDL)
2019 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
2019 Design Automation Conference (DAC)
2019 European Test Symposium (ETS)
2019 Design Automation and Test in Europe (DATE)
2019 Great Lakes Symposium on VLSI (GLSVLSI)
2019 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
2018 Forum on specification & Design Languages (FDL)
2018 Design Automation Conference (DAC)
2018 Euromicro Conference on Digital System Design (DSD)
2018 Great Lakes Symposium on VLSI (GLSVLSI)
2018 Design Automation and Test in Europe (DATE)
2018 European Test Symposium (ETS)
2018 Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
2018 International Workshop on Boolean Problems (IWSBP)
2017 Forum on specification & Design Languages (FDL)
2017 International Conference on Very Large Scale Integration (VLSI-SoC)
2017 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
2017 Great Lakes Symposium on VLSI (GLSVLSI)
2017 Design Automation and Test in Europe (DATE)
2017 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
2017 2nd International Workshop on Resiliency in Embedded Electronic Systems (REES)
2016 Workshop on Computer-Aided Design and Implementation for Cryptography and Security (CADICS)
2016 Forum on specification & Design Languages (FDL)
2016 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
2016 International Joint Conference on Pervasive and Embedded Computing and Communication Systems (PEC)
2016 International Workshop on Boolean Problems (IWSBP)
2015 International Conference on Computer Aided Design (ICCAD)
2015 Forum on specification & Design Languages (FDL)
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
2015 International Conference on Very Large Scale Integration (VLSI-SoC)
2015 Design Automation and Test in Europe (DATE)
2015 International Workshop on Design and Implementation of Formal Tools and Systems (DIFTS)
2015 1st International ESWEEK Workshop on Resiliency in Embedded Electronic Systems (REES)
2014 Forum on specification & Design Languages (FDL)
2014 Design Automation and Test in Europe (DATE)
2014 International Workshop on Design and Implementation of Formal Tools and Systems (DIFTS)
2014 International Workshop on Boolean Problems (IWSBP)
2013 International Workshop on Microprocessor Test and Verification (MTV)
2013 International Workshop on Design and Implementation of Formal Tools and System (DIFTS)
2013 Forum on specification & Design Languages (FDL)
2013 Design Automation and Test in Europe (DATE)
2012 Forum on specification & Design Languages (FDL)
2012 International Conference on Formal Methods and Models for Codesign (MEMOCODE)
2012 Design Automation and Test in Europe (DATE)
2012 International Workshop on Boolean Problems (IWSBP)
2012 GMM/ITG/GI-Workshop Cyber-Physical Systems - Enabling Multi-Nature Systems (CPMNS)
2011 Forum on specification & Design Languages (FDL)
2011 Design Automation and Test in Europe (DATE)
2011 International Workshop on Microprocessor Test and Verification (MTV)
2011 Seventh International Workshop on Constraints in Formal Verification (CFV)
2011 2011 GMM/ITG/GI-Workshop Cyber-Physical Systems - Enabling Multi-Nature Systems (CPMNS)
2010 Forum on specification & Design Languages (FDL)
2010 International Workshop on Microprocessor Test and Verification (MTV)
2010 International Workshop on Boolean Problems (IWSBP)
2010 IEEE Congress on Evolutionary Computation (CEC)
2009 Forum on specification & Design Languages (FDL)
2009 IEEE Congress on Evolutionary Computation (CEC)
2009 GI/GMM/ITG-Workshop Multi-Nature Systems: Entwicklung von Systemen mit elektronischen und nichtelektronischen Komponenten (MNS)
2008 International Workshop on Boolean Problems (IWSBP)

Jury Member

2018 Best Paper Award Committee of Forum on specification & Design Languages (FDL)
2012 Best DATE-IP Award Committee

Projects

  • Participation and organization of several research projects funded by the German Research Foundation (DFG), the Federal Ministry of Education and Research (BMBF), the Federal Ministry for Economic Affairs and Energy (BMWi), the German Academic Exchange Service (DAAD)
  • Many projects are in cooperation with partners from academia and industry (e.g. AMD, Bosch, Concept Engineering, COSEDA Technologies, Kasper & Oswald, Infineon, Intel, Mentor Graphics, MINRES Technologies, Mixed Mode, NXP, OneSpin Solutions, Siemens, Volkswagen)

Project Leader

Since 2020 VerA: Vollautomatische Formale Verifikation Arithmetischer Schaltkreise
Research project funded by the DFG (German Research Foundation)
PI in collaboration with Prof. Rolf Drechsler, Prof. Christoph Scholl
Since 2020 AUTOASSERT: Simulationsbasiertes Entwurfswerkzeug zur automatisierten Überprüfung von analog-digitalen Elektroniksystemen
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with COSEDA Technologies GmbH
PI
2020–2020 Scale4Edge: Entwicklungsplattform und Ökosystem für skalierbare Spezialprozessoren im Edge-Computing
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with MINRES Technologies GmbH, Bosch and Infineon Technologies
Joint PI with Vladimir Herdt, Prof. Rolf Drechsler
2019–2022 VerSys: Eine konsistente Verifikationsplattform zur frühen Softwareentwicklung für RISC-V-basierte Systeme
Research project funded by the BMBF (German Ministry of Education and Research)
Joint PI with Prof. Rolf Drechsler, Prof. Christoph Lüth
2018–2020 SATiSFy: Validierung von SAfeTy- und Security-Anforderungen in autonomen Fahrzeugen
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with Volkswagen, Bosch, Concept Engineering, Kasper & Oswald
Joint PI with Prof. Tim Güneysu, Prof. Dieter Hutter, Prof. Rolf Drechsler
2017–2020 Formalizations and properties of plans
Research project funded by the DFG (German Research Foundation) within the Collaborative Research Center (SFB 1320) EASE (Everyday Activity Science and Engineering)
PI in collaboration with Prof. Rolf Drechsler
2017–2020 CONVERS: Verifikationsautomatisierung für Mixed Signal Systeme
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with COSEDA Technologies GmbH
PI
2017–2020 SecRec: Security by Reconfiguration
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with Bosch and Mixed Mode
Joint PI with Prof. Tim Güneysu, Prof. Rolf Drechsler
2017–2019 CONFIRM: Automatisierter Firmware-Entwurf unter Berücksichtigung von Timing- und Power-Budgets für anwendungsspezifische Elektroniksysteme
Research project (EDA-Clusterforschung) funded by the BMBF (German Ministry of Education and Research) and industry (Bosch, Infineon, Intel, and Mentor Graphics)
Joint PI with Prof. Rolf Drechsler
2015–2016 EffektiV: Effiziente Fehlereffektsimulation mit virtuellen Prototypen zur Qualifikation intelligenter Motion-Control-Systeme in der Industrieautomatisierung
Research project funded by the BMBF (German Ministry of Education and Research)
Joint PI with Prof. Rolf Drechsler
2013–2014 SolVerTec: Entwicklung eines automatischen Debugging Werkzeugs
Transfer project Phase II, funded by the BMWi (Federal Ministry for Economic Affairs and Energy) within the EXIST Transfer of Research
Joint PI with Jan Wessels
2011–2013 SolVerTec: Entwicklung eines automatischen Debugging Werkzeugs
Transfer project Phase I, funded by the BMWi (Federal Ministry for Economic Affairs and Energy) within the EXIST Transfer of Research
Joint PI with Prof. Rolf Drechsler, Prof. Görschwin Fey, Dr. Andre Sülflow
2009–2011 SANITAS: Sichere Systeme auf Basis einer durchgängigen Verifikation entlang der gesamten Wertschöpfungskette
Research project funded by the BMBF (German Ministry of Education and Research)
Cooperation with Infineon
Joint PI with Prof. Rolf Drechsler

Coordinator or WP Leader

2016–2019 SELFIE: Selbstverifikation von Elektronischen Systemen
Research project funded by the BMBF (German Ministry of Education and Research)
2016–2019 MANIAC: BDD Manipulation für Approximate Computing
Research project funded by the DFG (German Research Foundation)
2015–2016 Faster Formal Verification with Reverse Engineering
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. Robert K. Brayton, University of California, Berkeley (joint project with Dr. Mathias Soeken, EPFL, Switzerland)
2015–2016 Model-based Test Generation for Trustworthy Multi-core Virtual Prototypes
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. Mingsong Chen, East China Normal University (ECNU) Shanghai, China
2015–2020 Graduate School System Design (SyDe)
Structured educational program for PhD students, funded within the German Excellence Initiative, in cooperation with the German Research Center for Artificial Intelligence (DFKI) and the German Aerospace Center (DLR)
2015–2017 Entwicklung eines durchgängigen Verifikationsablaufes für den ESL Entwurf
Reinhart Koselleck-Project of Prof. Rolf Drechsler, funded by the DFG (German Research Foundation)
2011–2012 Entwicklung eines durchgängigen Verifikationsablaufes für den ESL Entwurf
Reinhart Koselleck-Project of Prof. Rolf Drechsler, funded by the DFG (German Research Foundation)
2009–2011 Qualitätsorientierte Synthese großer Funktionen in reversibler Logik
Research project funded by the DFG (German Research Foundation)
2009–2010 Qualitätsorientierter Entwurf von Systemen mit rekonfigurierbaren Komponenten
Research project with Prof. Wolfgang Nebel, Carl von Ossietzky University Oldenburg, funded by the Nowetas-Stiftung
2008–2009 Synthese zuverlässiger Quantenschaltkreise
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. Gerhard W. Dueck, University of New Brunswick, Canada
2008 Industry project on Verification of Smart Cards
funded by NXP, Austria
2005–2008 URANOS: Analysemethoden für den Entwurf anwendungsrobuster nanoelektronischer Systeme
Research project funded by the BMBF (German Ministry of Education and Research) Cooperation with AMD Dresden, Germany

Participation

2006–2008 Manipulation Boolescher Funktionen mit hybriden Datenstrukturen
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. J. Marques-Silva, Southampton, UK
2005–2006 Effiziente Methoden zum Debugging von Schaltungen und Systemen
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. Mitch Thornton, Southern Methodist University, Dallas, USA
2005 Implementing Modules and ECTS for Computer Studies
Exchange project funded by the European Union
2003–2005 Schaltungs- und Systemverifikation auf der Wortebene
Exchange project funded by the DAAD (German Academic Exchange Service)
Cooperation with Prof. Maciej Ciesielski, University of Massachusetts, Amherst, USA
2003 Industry project on formal verification of a processor
funded by Infineon Technologies AG, Munich, Germany
2002 Industry project on formal verification of a cellular base station
funded by Siemens AG, Munich, Germany

Miscellaneous

Awards and Nominations

2022 “Best Paper Award” at the Forum on specification & Design Languages (FDL)
2021 “Best Paper Candidate (IP)” at Design Automation and Test in Europe (DATE)
2020 “Best Paper Award” at the Forum on specification & Design Languages (FDL)
2020 “IEEE Senior Member”
2019 “Best Research Demo Award” at IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
2018 “Best Paper Award” at International Conference on Computer Aided Design (ICCAD)
2018 “Best Paper Award” at Design and Verification Conference and Exhibition Europe (DVCon Europe)
2018 “Best Poster Award” at ACM Great Lakes Symposium on VLSI (GLSVLSI)
2017 “Best Paper Award Candidate” at Forum on specification & Design Languages (FDL)
2016 “Best Paper Award Candidate” at Design Automation and Test in Europe (DATE)
2016 “Best Paper Award Candidate” at Forum on specification & Design Languages (FDL)
2014 “Embedded Award” in category tools for automated debugging software at Germanys #1 trade fair for embedded systems, the Embedded World in Nuremberg
2013 “Weconomy Award” for solvertec GmbH from Wissensfabrik e.V. – CEO Network of over 100 German Companies
2013 “IKT Innovativ Award” for solvertec as one of Germanys top 4 innovative technology start-ups from BMWi (Federal Ministry for Economic Affairs and Energy)
2009 Finalist of the “GI-Dissertationspreis” (thesis award by the German Informatics Society (GI) together with the Swiss Informatics Society (SI), the Austrian Computer Society (OCG) and the German Chapter of the ACM (GChACM))
2008 “Bremer Studienpreis” (Bremen Study Award) for dissertation
2007 “Best Paper Award” at the Forum on specification & Design Languages (FDL)

Doctoral Students

2021– Christoph Hazott
2021– Katharina Ruep
2020– Lucas Klemmer

Doctoral Students co-supervised in Bremen

2018– Niklas Bruns
2018– Pascal Pieper
2017– Tim Meywerk
2016–2022 Buse Ustaoglu, PhD 2022
2016–2022 Alireza Mahzoon, PhD 2022 summa cum laude
2016–2022 Saman Fröhlich, PhD 2022
2015–2021 Muhammad Hassan, PhD 2021 summa cum laude
2015–2020 Vladimir Herdt, PhD 2020 summa cum laude
2015–2019 Kenneth Schmitz, PhD 2019
2015–2017 Arun Chandrasekharan, PhD 2017
2015–2017 Amr Sayed Ahmed, PhD 2017
2012–2015 Melanie Diepenbeck, PhD 2015
2010–2014 Marc Michael, PhD 2014
2009–2015 Hoang M. Le, PhD 2015 summa cum laude
2009–2016 Finn Headicke, PhD 2016
2006–2009 Ulrich Kühne, PhD 2009

Awards and Recognitions obtained by Students during my Supervision

2020 “DAC 2020 Young Student Fellow Program” (awarded to Vladimir Herdt)
2020 “PhD Forum Prize” (for the PhD Forum presentation at DATE awarded to Alireza Mahzoon)
2017 “Bremer Studienpreis” (Bremen Study Award) for PhD thesis awarded to Hoang M. Le
2016 “DAC 2016 Richard Newton Young Student Fellowship” (awarded to Arun Chandrasekharan)
2013 “Best Poster Award” (for the PhD Forum presentation at DATE awarded to Hoang M. Le)
2012 “Best Poster Award” (for the PhD Forum presentation at ASP-DAC awarded to Hoang M. Le)

Memberships in Professional Societies/Organizations

Since 2021 Österreichische Computer Gesellschaft (Austrian Computer Society, OCG)
Since 2019 Speaker of the Steering Committee of the special interest group “Fachgruppe 3: Methoden des Entwurfs und der Verifikation digitaler Schaltungen und Systeme (RSS-VERIFY)” of the “GI/GMM/ITG Kooperationsgemeinschaft Rechnergestützter Schaltungs- und Systementwurf (RSS)”
Since 2013 Allied Member of Accellera Systems Initiative in the SystemC Verification Working Group
Since 2008 Member of the Steering Committee of the special interest group “Fachgruppe 1: Allgemeine Methodik und Unterstützung von Entwurfsprozessen für Schaltungen und Systeme (RSS-Method)” of the “GI/GMM/ITG Kooperationsgemeinschaft Rechnergestützter Schaltungs- und Systementwurf (RSS)”
Since 2005 Gesellschaft für Informatik (German Informatics Society, GI)
Since 2003 Institute of Electrical and Electronics Engineers (IEEE), “Senior Member” since 2020